Xsight Labs Unveils E1L DPU for Power-Constrained Infrastructure

The E1L leverages the same Arm Neoverse N2 architecture and software stack as the company's flagship 800G E1, allowing developers to deploy consistent infrastructure code from the network edge to the core. By utilizing TSMC’s N5 process, the chip provides up to 200 Gbps of throughput while maintaining a thermal design power range of 25 to 40 watts. This design choice addresses the primary challenge for operators working in sites where specialized cooling is unavailable or power budgets are strictly limited.

Beyond power efficiency, the E1L emphasizes software openness. It supports standard Linux distributions and common frameworks like XDP, DPDK, and SPDK without requiring proprietary licensing. According to Xsight Labs CEO Yossi Meyouhas, this unified architecture is a direct response to customer demand for DPU functionality within existing power envelopes. As AI workloads shift toward agent-based models that increase traffic to storage and networking systems, the E1L is intended to isolate infrastructure tasks from host CPUs, ensuring performance remains stable even in resource-constrained settings. The company plans to begin sampling the E1L in the second quarter of 2027.